Digital Logic 3

5.   Combinational Circuits

5.1 Universal Gates

NAND and NOR gates are universal gate. They can implement any gates like AND, OR and NOT or any combination of these basics gates.

 5.1.1        NAND Gate

A NAND gate is a Negated AND or NOT AND gate.

-Below are combination of NAND gate to become different gates.

	Gates	Equivalent NAND Gates
NOT
AND
OR
NOR

5.1.2        NOR Gate

A NOR gate is a Negated OR or NOT OR gate.

-Below are combination of NOR gate to become different gates.

	Gates	Equivalent NOR Gates
NOT
AND
OR
NAND

5.1.3       Half Adder

a)     Half adder is the combination of XOR and AND gate. It accept 2 binary digits on its input and produce two outputs, sum (S) and carry (C) bit.

a)      Truth Table for Half Adder

A	B	Cout	∑
0	0	0	0
0	1	0	1
1	0	0	1
1	1	1	0

*Note:

∑ = AB̅ + A̅B

c)      From Karnaugh Map,

From the simplified function, we can derive the logic diagram for half adder:

5.1.4          Full Adder

Full adder accept two bits and an input carry and generates a sum output and a carry output.

Truth Table for Full Adder

Cin	A	B	Cout	∑
0	0	0	0	0
0	0	1	0	1
0	1	0	0	1
0	1	1	1	0
1	0	0	0	1
1	0	1	1	0
1	1	0	1	0
1	1	1	1	1

Logic Diagram for full adder

5.1.5          Multiplexer

- Multiplexer is also known as selector, since its output is one of the input that are selected by a control. 

- Multiplexer usually use in phone and cable network.

This is the example of multiplexer,

-          The selector is a single signal that determines which input will come put as the output. It also can select one of the input if it I TRUE (1) and the other if it is False(0).

-          The multiplexer can create an arbitrary number of data inputs.

-          If there are n data inputs, then it will be log₂n selector input.  

Below is a 4-to-1 multiplexer, which it has;

Input lines C0, C1, C2, C3

2 select lines A, B

2select lines à 2² = 4 input lines

Truth Table for Multiplexer

Select Input		Binary	Output = Input selected
A	B
0	0	0	C0
0	1	1	C1
1	0	2	C2
1	1	3	C3

If binary 0 (A = 0 and B =0) is applied to the data-selected lines, the data on input C0 appear on the data output line.

5.1.6                     Decoders

-           - A decoder is the combinational circuit with a number of output lines, only one of which is asserted at any time, dependent on the pattern of input lines.

      - In general, a decoder has n inputs and 2ⁿ outputs. E.g when a decoder has 2 inputs, then it has 4 outputs. The decoder is call 2-to-4 decoder.

A1	A0	D3	D2	D1	D0
0	0	0	0	0	1
0	1	0	0	1	0
1	0	0	1	0	0
1	1	1	0	0	0

Misterm Equation

D₀ = A̅₁ . A̅₀

D₁ = A̅₁ . A₀

D₂ = A₁ . A̅₀

D₃ = A₁ . A₀

Written by Soo Pheng Kian (B031210015)